FIG. 6 shows a conventional inverter apparatus. The numeral 1 indicates a three-phase alternating-current power supply, 2 indicates a rectifier circuit for rectifying three-phase alternating currents which are input to the rectifier, and 3 indicates a three-phase switch circuit, e.g., a three-phase main relay, having contacts 3a, 3b and 3c for connecting or disconnecting the outputs of the three-phase alternating-current power supply 1 and the inputs of the rectifier circuit 2. Reference numeral 4 indicates a smoothing capacitor circuit for smoothing the rectification outputs of the rectifier circuit 2. Reference numeral 5 indicates a semiconductor switching circuit which receives direct currents smoothed by the smoothing capacitor 4 and constitutes the output section of a PWM (pulse width modulation) circuit that outputs the PWM-modulated three-phase alternating currents.
The semiconductor switching circuit 5 includes an upper arm transistor 5a and a lower arm transistor 5b. These form a U phase. The switching circuit 5 also includes an upper arm transistor 5c and a lower arm transistor 5d, forming a V phase. Finally, the switching circuit includes an upper arm transistor 5e and a lower arm transistor 5f forming a W phase. Flywheel diodes 5g, 5h; 5i, 5j; 5k and 5l are connected in antiparallel with said upper and lower arm transistors 5a, 5b in the U phase; 5c, 5d in the V phase; and 5e, 5f in the W phase, respectively. The transistors 5a to 5f are switched on/off under the control of a control signal output from a switch controlling means, for example, a switch control section (not shown). Three-phase alternating currents are output from the connecting points of the upper and lower arm transistors in the three phases. The semiconductor switching circuit 5 and the switching control section constitute the PWM circuit.
Reference numeral 6 indicates an overcurrent detector circuit for detecting an excess current by monitoring the magnitude of a current which is input to the semiconductor switching circuit 5 after it has been rectified by the rectifier circuit 2 and smoothed by the smoothing capacitor 4. Reference numeral 7 indicates a motor which is rotated by the PWM-modulated three-phase alternating currents output from the semiconductor switching circuit 5.
Reference numeral 8 indicates a two-phase switch circuit, for example, a two-phase relay, having two contacts 8a and 8b. Reference numeral 9a indicates a resistor connected in series with the contact 8a of the two-phase relay 8, and 9b, a resistor connected in series with the contact 8b of the two-phase relay 8.
A series combination of the contact 8a and the resistor 9a is connected in parallel with the contact 3a of the three-phase main relay 3, and a series combination of the contact 8b and the resistor 9b is connected in parallel with the contact 3b of the three-phase main relay 3.
A circuit comprising the rectifier circuit 2 and the smoothing capacitor 4 is referred to as a converter.
The operation of the protective functions of the inverter apparatus of the prior art shown in FIG. 6 will now be described.
First, before the three-phase main relay 3 is switched on, the two-phase relay 8 is switched on by the switching control section (not shown). Two-phase alternating currents are input to the rectifier 2 via the resistors 9a, 9b and rectified voltages output from the rectifier circuit 2 are applied across the smoothing capacitor 4, thereby gradually charging the smoothing capacitor 4. When the charging is complete in a predetermined period of time, the three-phase main relay 3 is turned on by the switching control section. It should be noted that at this point, the transistors of the semiconductor switching circuit 5 are all turned off.
If an excess current has been detected by the detection output of the overcurrent detector 6 immediately after the three-phase main relay 3 has been turned on, it is judged that a short circuit between the positive-voltage input terminal and the negative-voltage input terminal of the semiconductor switching circuit 5 (hereinafter referred to as a P-N short circuit) has occurred, and the three-phase main relay 3 and the two-phase relay 8 are shut off, thereby preventing a secondary failure from occurring.
On the other hand, if the P-N short circuit is not detected, the upper arm transistors 5a, 5c, 5e of the semiconductor switching circuit 5 are switched on, and then the overcurrent detector circuit 6 again detects whether an excess current exists. If an excess current is now detected, it is judged that a ground fault has taken place, and the switching control section switches off the upper arm transistors 5a, 5c, 5e of the semiconductor switching circuit 5 and also shuts off the three-phase main relay 3 and the two-phase relay 8.
When no ground fault has occurred, switching on only the upper arm transistors 5a, 5c, 5e does not cause currents to flow into the semiconductor switching circuit 5.
Instead of turning on the upper arm transistors in the U, V and W phases at the same time for this ground fault detection as described above, whether or not a ground fault has occurred may also be judged by switching on the upper arm transistors in the U, V and W phases in sequence to examine whether a ground fault has occurred in any of the phases.
When the P-N short circuit and the ground fault are not detected, the semiconductor switching circuit 5 is operated to enter an actual operating state for causing currents to flow in the motor 7.
With the conventional device described above, a problem exists. Specifically, there is no detection of whether the upper or lower arm transistor in the semiconductor switching circuit 5 has short circuited until after an excess current has been detected by the overcurrent detector 6. Thus, the semiconductor switching circuit 5 may endure a high current load.
Further, since the known inverter apparatus and inverter controlling method having protective functions are arranged as described above, large currents flow in the upper arm transistors 5a, 5c, 5e and lower arm transistors 5b, 5d, 5f when a ground fault and a transistor fault are detected. Therefore, the transistors are capable of being damaged and/or stressed.
Also, since a P-N impedance fault is not detected until an overcurrent state actually occurs, the semiconductor switching circuit 5 or circuit parts connected thereto cannot be protected and are therefore susceptible to being damaged and/or stressed. In this situation, the control input of each transistor is set so as to keep the transistors off.
Still further, according to the conventional device described above, it is difficult to troubleshoot the fault. That is, it is difficult to detect whether a fault is a P-N impedance fault, a ground fault or a fault occurring in one of the transistors. Further, if it is a fault occurring in one of the transistors, it is difficult to know which of the transistors is faulty.